Overview
On November 9, 2026 Google added two system configurations to its eighth-generation TPU lineup: TPU 8i Max and TPU 8tx. They are the fourth system shipped within a single generation in one year, which Google frames as evidence of its co-design cadence.
TPU 8i Max packages two TPU 8i chips together, doubling compute, SRAM and HBM bandwidth, aimed at very large context windows and the highest compute density per rack. Longer contexts lean harder on memory bandwidth for KV cache, and bonding two chips is a direct answer to that. TPU 8tx takes another route: a TPU 8t chip with a fifth-generation AMD EPYC host processor, built for confidential inference with latency up to twice as low as TPU 8t. Confidential computing has historically been expensive on accelerators, and this part is an attempt to shrink that premium.
Neither configuration comes with absolute specs, benchmark numbers, pricing or available regions. What is concrete sits in the software stack: TorchTPU runs PyTorch and Hugging Face models natively without code changes, the open-sourced TPU Sync cuts KV transfer latency by more than 90%, and Agent Compute Engine trims idle capacity.
Sundar Pichai emphasized cadence when he shared the news: hardware teams designing alongside Google DeepMind rather than waiting on conventional semiconductor cycles. That maps to four systems in twelve months. For users, what is available now remains 8t and 8i; the significance of 8i Max depends on when it reaches cloud regions and at what price.
Key Features
- Two-die TPU 8i Max: Two TPU 8i chips in one package, doubling compute, SRAM and HBM bandwidth, aimed at very long context windows and maximum per-rack density.
- Confidential inference on 8tx: A TPU 8t chip paired with a fifth-generation AMD EPYC host, built for confidential inference with up to twice lower latency than TPU 8t.
- Four systems in one year: The eighth generation now spans four distinct system configurations within a year, designed jointly by hardware teams and Google DeepMind rather than paced by conventional semiconductor cycles.
- TorchTPU runs PyTorch natively: Runs PyTorch and Hugging Face models directly without rewriting code, leaving operator coverage and tuning as the main migration work.
- Open-sourced TPU Sync: Cuts KV cache transfer latency by more than 90%, which lowers communication overhead for long-context and multi-host inference.
- Agent Compute Engine: Eliminates idle capacity in agent workloads, trimming the resources held between intermittent calls.
Use Cases
- Long-context inference where KV cache is limited by memory bandwidth.
- Confidential inference workloads with data residency and isolation requirements.
- Existing PyTorch training and inference code that should run on TPU without a rewrite.
- Multi-host inference clusters where KV transfer is the bottleneck.
Pros
- 8i Max doubles compute, SRAM and HBM bandwidth by pairing two dies, and long context benefits most directly.
- 8tx with an AMD EPYC host sharply reduces the latency cost of confidential inference.
- TorchTPU runs PyTorch and Hugging Face models without code changes, lowering the migration bar.
- TPU Sync is open source and cuts KV transfer latency by more than 90%, helping both long-context and multi-host work.
- Four systems in a year shows the line is still accelerating.
Pricing
Google has not published pricing, absolute specs or available regions for TPU 8i Max and 8tx, and no benchmark data either. Eighth-generation TPUs are offered through Google Cloud on on-demand, committed-use and reserved terms, with quotes set by region and contract.
Summary
TPU 8i Max and 8tx are two new configurations in the eighth generation: the first pairs two 8i dies to double compute, SRAM and HBM bandwidth for long context and rack density, while the second uses an 8t chip with a fifth-generation AMD EPYC host for confidential inference at up to half the latency. TorchTPU runs PyTorch without code changes and TPU Sync cuts KV transfer latency by over 90%. Specs, pricing and regions remain unpublished.
Version History
- TPU 8i Max and TPU 8tx arrive as the fourth system this year (2026-11-09): Google expanded its eighth-generation TPU lineup with TPU 8i Max and TPU 8tx. TPU 8i Max packages two TPU 8i chips together, doubling compute, SRAM and HBM bandwidth for very large context windows and maximum per-rack density; TPU 8tx pairs a TPU 8t chip with a fifth-generation AMD EPYC host for confidential inference at up to twice lower latency than 8t. It is the fourth system shipped within one generation in a single year. On the software side, TorchTPU runs PyTorch and Hugging Face models natively, the open-sourced TPU Sync cuts KV transfer latency by more than 90%, and Agent Compute Engine removes idle capacity. Absolute specs, benchmarks, pricing and available regions were not disclosed.